公开(公告)号：US20180040365A1

公开(公告)日：2018-02-08

申请号：US15631101

申请日：2017-06-23

Applicant: Renesas Electronics Corporation

Inventor： Yukio MAKI ,  Yoshiyuki ISHIGAKI ,  Toshiaki TAI ,  Hideaki YAMAKOSHI ,  Toshihiko HIROSE ,  Takuya ISHIDA

IPC: G11C11/417 ,  H01L23/535 ,  H01L21/265 ,  H01L27/11

CPC classification number: G11C11/417 ,  G11C11/4125 ,  H01L21/265 ,  H01L23/535 ,  H01L27/1104

Abstract: A semiconductor device which suppresses soft errors and functions as a non-volatile memory and a method for manufacturing the same. In the semiconductor device, a first non-volatile memory element and a second non-volatile memory element are electrically coupled to a first memory node and a second memory node through a first MOS transistor and a second MOS transistor respectively. A first capacitor and a second capacitor each have a storage node electrically coupled to the first memory node and the second memory node respectively and each have a cell plate to form a capacitance between the storage node and the cell plate.