公开(公告)号：US20040008096A1

公开(公告)日：2004-01-15

申请号：US10342183

申请日：2003-01-15

Applicant: RichTek Technology Corp.

Inventor： Jing-Meng Liu ,  Kent Hwang ,  Chao-Hsuan Chuang ,  Cheng-Hsuan Fan

IPC: H03H011/00

CPC classification number: H03H11/485 ,  H03H11/48

Abstract: An inductor equivalent circuit is disclosed. The circuit comprises a reference current source, a first current mirror, a second current mirror, two operational amplifiers OP1 and OP2, a capacitor, a first transistor, a second transistor, a mirror resistor set, and a bypass current source in parallel with the capacitor. An input signal is through OP1 and second transistor to control the reference current source. The first mirror current is then feed-back a signal to the first transistor through an OP2. The current signal makes the drain current of the first transistor lags the input voltage signal by 90null due to the capacitor coupled with the first mirror current source. The mirror resistor set can be resistors having one common terminal grounded, and other terminals each, respectively, coupled with the first and the second transistor and the capacitor, or can be composed of transistors and all of them with gate property biased so that the transistors in the mirror resistor set are operated in an ohmic region. The second mirror current provides an output current of the inductor equivalent circuit for next cascade stage.

公开(公告)号：US20030141923A1

公开(公告)日：2003-07-31

申请号：US10229160

申请日：2002-08-28

Applicant: Richtek Technology Corp.

Inventor： Jing-Meng Liu ,  Kent Hwang ,  Chao-Hsuan Chuang ,  Cheng-Hsuan Fan

IPC: G05F001/10

CPC classification number: G05F3/262

Abstract: A resistance adjustable of resistance mirror circuit comprises: a master resistor R0, a reference current source terminal providing a current value I0 through the master resistor R0 to ground; a first transistor; a current mirror source terminal providing a current value nI0, through the first transistor to ground; an operational amplifier having a positive terminal connecting to a drain of the first transistor, a negative terminal connecting to the other terminal of the master resistor R0, and an output terminal connecting to a gate of the first transistor; a mirror resistor set composed of a plurality of transistors in parallel each other and having their source electrode connecting to ground. Each transistor of the mirror resistor set has a ratio of channel width over channel length being m-fold of that of the first transistor, where m, n is any positive numbers. Since gates of the transistors connect to the output terminal of the operational amplifier, each of the transistors therefore has an equivalent resistance Reqnull(1/nm)R0.

Abstract translation: 电阻镜电路的电阻可调，包括：主电阻R0，一个参考电流源极端子，通过主电阻器R0接地提供电流值I0; 第一晶体管; 电流镜源端子，通过第一晶体管接地提供电流值nI0; 具有连接到第一晶体管的漏极的正端子的运算放大器，连接到主电阻器R0的另一端子的负极端子和连接到第一晶体管的栅极的输出端子; 由多个彼此并联的晶体管组成并且其源电极连接到地的镜电阻器组。 镜面电阻器组的每个晶体管的沟道宽度与沟道长度的比率与第一晶体管的沟道长度的m倍成正比，其中m，n是任何正数。 由于晶体管的栅极连接到运算放大器的输出端，因此每个晶体管具有等效电阻Req =（1 / nm）R0。