公开(公告)号：US20070217336A1

公开(公告)日：2007-09-20

申请号：US11377578

申请日：2006-03-17

申请人： Jason Sterne ,  Robert Johnson ,  Aaron MacDonald ,  Richard Grieve ,  James Schriel

发明人： Jason Sterne ,  Robert Johnson ,  Aaron MacDonald ,  Richard Grieve ,  James Schriel

IPC分类号： H04J1/16 ,  H04L12/56

CPC分类号： H04L47/10 ,  H04L47/266 ,  H04L47/30 ,  H04L47/32 ,  H04L49/90 ,  Y02D50/10

摘要： A method for incorporating a queuing device as a lossless processing stage in a network device in a communications network, comprising: monitoring a depth of a queue in the queuing device, the queue for receiving packets from an upstream device within the network device, the queuing device acting as a discard point by discarding packets when the queue is full; and, if the depth passes a predetermined threshold, sending a message to the upstream device to reduce a rate at which packets are sent to the queuing device to prevent the queue from filling and thereby preventing packet discarding and loss by the queuing device.

摘要翻译： 一种在通信网络中的网络设备中将排队设备作为无损处理级并入的方法，包括：监视队列设备中的队列的深度，用于从网络设备内的上游设备接收分组的队列，排队 设备在队列满时通过丢弃报文作为丢弃点; 并且如果深度通过预定阈值，则向上游设备发送消息以降低分组被发送到排队设备的速率，以防止队列填满，从而防止排队设备丢包和丢失。

公开(公告)号：US20070208926A1

公开(公告)日：2007-09-06

申请号：US11366661

申请日：2006-03-03

申请人： Richard Grieve ,  Aaron MacDonald ,  James Schriel

发明人： Richard Grieve ,  Aaron MacDonald ,  James Schriel

IPC分类号： G06F15/177

CPC分类号： G06F9/4401

摘要： A method and apparatus are provided for storing the boot configuration PROM of a microprocessor in an FPGA. The boot interface of the microprocessor, such as an I2C interface, leads to the FPGA instead of to a PROM. The boot configuration is stored as an image in the FPGA, and the microprocessor accesses the boot configuration using its normal boot interface. In this way, a dedicated boot PROM is not needed, saving real estate on the card on which the microprocessor is located. The boot configuration is also more easily modified, such as for version upgrades or diagnostics, than if the boot configuration were stored on a dedicated PROM. Different boot configurations may be stored as software images on a separate housekeeper processor, for loading into the FPGA.

摘要翻译： 提供了一种用于将微处理器的引导配置PROM存储在FPGA中的方法和装置。 微处理器的引导接口（如I2C接口）通向FPGA而不是PROM。 引导配置作为图像存储在FPGA中，微处理器使用其正常引导接口访问引导配置。 以这种方式，不需要专用的引导PROM，从而在微处理器所在的卡上节省不动产。 引导配置也比如果引导配置存储在专用PROM上更容易修改，例如用于版本升级或诊断。 不同的引导配置可以作为软件映像存储在单独的管家处理器上，用于加载到FPGA中。

公开(公告)号：US20070211838A1

公开(公告)日：2007-09-13

申请号：US11370575

申请日：2006-03-08

申请人： Dion Pike ,  James Schriel ,  John Madsen

发明人： Dion Pike ,  James Schriel ,  John Madsen

IPC分类号： H04L7/00

CPC分类号： H04J3/0688 ,  G06F1/04 ,  G06F1/10

摘要： Timing signal recovery and distribution apparatus and methods are disclosed. A timing synchronization source signal is selected from timing signals recovered by multiple communication devices. The timing signals may have any of multiple different frequencies. A timing distribution signal is generated by applying to the selected synchronization source signal one of multiple timing distribution signal generation schemes. The multiple generation schemes allow a timing distribution signal to be generated on the basis of synchronization source signals having respective different frequencies.

摘要翻译： 公开了定时信号恢复和分配装置和方法。 定时同步源信号从由多个通信设备恢复的定时信号中选择。 定时信号可以具有多个不同频率中的任何一个。 通过将所选择的同步源信号应用于多个定时分配信号生成方案中的一个来生成定时分配信号。 多代方案允许基于具有各自不同频率的同步源信号来生成定时分配信号。

公开(公告)号：US20070208927A1

公开(公告)日：2007-09-06

申请号：US11367414

申请日：2006-03-06

申请人： Arnaud Bellens ,  James Schriel ,  Mark Megarity

发明人： Arnaud Bellens ,  James Schriel ,  Mark Megarity

IPC分类号： G06F15/177

CPC分类号： H04L12/66

摘要： A method for resetting a component of an off-card assembly in a redundant system, the redundant system having first and second control plane cards coupled to the off-card assembly by respective serial interfaces, each serial interface including a respective status line and a respective clock line, each status line for providing a respective activity indication and a respective reset instruction, each clock line for providing a respective clock signal, the method comprising: monitoring respective activity indications and clock signals from the first and second control plane cards by the off-card assembly to determine which of the first and second control plane cards is an active card; and, selecting the reset instruction from the active card to reset the component, thereby resolving any conflict between respective reset instructions.

摘要翻译： 一种用于重置冗余系统中的卡外组件的组件的方法，所述冗余系统具有通过相应串行接口耦合到所述离卡组件的第一和第二控制平面卡，每个串行接口包括相应的状态线和相应的 时钟线，用于提供相应的活动指示和相应的复位指令的每个状态线，每个时钟线用于提供相应的时钟信号，所述方法包括：通过关闭来监视来自第一和第二控制平面卡的相应活动指示和时钟信号 卡组件以确定第一和第二控制平面卡中的哪一个是活动卡; 并且从活动卡中选择复位指令以复位该组件，从而解决各个复位指令之间的任何冲突。