公开(公告)号：US20060212764A1

公开(公告)日：2006-09-21

申请号：US11076020

申请日：2005-03-10

申请人： Richard Slobodnik ,  Paul Hughes ,  Frank Frederick ,  Brandon Backlund

发明人： Richard Slobodnik ,  Paul Hughes ,  Frank Frederick ,  Brandon Backlund

IPC分类号： G11C29/00

CPC分类号： G11C29/16 ,  G11C29/26 ,  G11C29/48 ,  G11C2029/0401 ,  G11C2029/3602

摘要： An integrated circuit and method for testing memory on that integrated circuit are provided. The integrated circuit comprises processing logic operable to perform data processing operations on data, and a number of memory units operable to store data for access by the processing logic. A memory test controller is also provided which is operable to execute test events in order to seek to detect any memory defects in the number of memory units. The memory test controller comprises a storage operable to store event defining information for each of a plurality of test events forming a sequence of test events to be executed, and an interface which, during a single programming operation, receives the event defining information for each of the plurality of test events and causes that event defining information to be stored in the storage. Event processing logic within the memory test controller is then operable, following the single programming operation, to execute the sequence of test events. This provides an efficient technique for enabling a sequence of test events to be programmed at run time.

摘要翻译： 提供了一种用于测试该集成电路上的存储器的集成电路和方法。 集成电路包括可操作以对数据执行数据处理操作的处理逻辑，以及可操作以存储用于由处理逻辑进行访问的数据的多个存储单元。 还提供了一种存储器测试控制器，其可操作以执行测试事件，以便寻求检测存储器单元数量中的任何存储器缺陷。 存储器测试控制器包括可操作以存储形成要执行的测试事件序列的多个测试事件中的每一个的事件定义信息的存储器，以及在单个编程操作期间接收每个测试事件的事件定义信息的接口 所述多个测试事件并且使所述事件定义要存储在所述存储器中的信息。 然后，在单个编程操作之后，存储器测试控制器内的事件处理逻辑可以执行测试事件的顺序。 这提供了一种有效的技术，可以在运行时对一系列测试事件进行编程。