公开(公告)号：US4071829A

公开(公告)日：1978-01-31

申请号：US740365

申请日：1976-11-09

申请人： Robert Curtis Davis ,  Daniel Dix McRae

发明人： Robert Curtis Davis ,  Daniel Dix McRae

IPC分类号： H04L27/14 ,  H03D3/02

CPC分类号： H04L27/14

摘要： A coherent phase detector using a frequency discriminator for reducing a frequency encoded signal to baseband, thereby avoiding the necessity of generating a coherent RF phase reference signal. A baseband processor is provided to compensate for error components arising in the frequency discriminator output. The baseband processor includes feedback loops for DC level correction and automatic gain correction. A novel scheme is also described for reducing the influence of interbit crosstalk on the operation of the baseband processor.

摘要翻译： 一种相干相位检测器，其使用频率鉴别器将频率编码信号减小到基带，从而避免产生相干RF相位参考信号的必要性。 提供基带处理器来补偿在鉴频器输出中产生的误差分量。 基带处理器包括用于直流电平校正和自动增益校正的反馈回路。 还描述了一种新颖的方案来减少串扰串扰对基带处理器的操作的影响。

公开(公告)号：US4096442A

公开(公告)日：1978-06-20

申请号：US790940

申请日：1977-04-26

申请人： Daniel Dix McRae ,  Earl Ford Smith

发明人： Daniel Dix McRae ,  Earl Ford Smith

IPC分类号： H04L5/08 ,  H04L7/027 ,  H04L27/14 ,  H04L27/144 ,  H04L27/18 ,  H04L27/227 ,  H03D3/02

CPC分类号： H04L7/027 ,  H04L27/14 ,  H04L27/144 ,  H04L27/2276 ,  H04L5/08

摘要： Demodulation of M-ary continuous-phase FSK signals is effected in accordance with phase measurements taken at symbol transition times. The phase error caused by intersymbol interference is estimated by knowledge of the type and degree of distortion which is principally dependent upon the frequency difference between successive data symbols and phase distortion characteristics of the channel filter. Pairs of phase nodes are selected at each symbol transition time and, from each pair, a tentative choice is made by using the expected phase distortion based on adjacent phase node pairs. Refined choices are then made using the estimated phase distortion based on adjacent tentative choices. Differences between successive tentative choices of phase node selections yield a sequence of frequencies making up the FSK signal. Circuitry implementation embraces the use of phase-locked loop detectors and digital decision logic including programmable read-only memories.

摘要翻译： M相连续相位FSK信号的解调是根据符号转换时间进行的相位测量来实现的。 由符号间干扰引起的相位误差通过知道失真的类型和程度来估计，其主要取决于连续数据符号之间的频率差和信道滤波器的相位失真特性。 在每个符号转换时间选择一对相位节点，并且通过使用基于相邻相位节点对的预期相位失真从每对中选择一个临时选择。 然后使用基于相邻临时选择的估计相位失真来进行精细选择。 相位节点选择的连续暂时选择之间的差异产生构成FSK信号的频率序列。 电路实现包括使用锁相环检测器和数字决策逻辑，包括可编程只读存储器。