System and method for providing a dual via architecture for thin film resistors
    1.
    发明授权
    System and method for providing a dual via architecture for thin film resistors 有权
    为薄膜电阻提供双通道架构的系统和方法

    公开(公告)号:US07960240B1

    公开(公告)日:2011-06-14

    申请号:US12217877

    申请日:2008-07-09

    IPC分类号: H01L21/20

    CPC分类号: H01L28/20 H01L28/24

    摘要: A buried thin film resistor having end caps defined by a dielectric mask is disclosed. A thin film resistor is formed on an integrated circuit substrate. A resistor protect layer is formed over the thin film resistor. First and second portions of a first dielectric material are formed over the resistor protect layer over the first and second ends of the thin film resistor. The resistor protect layer is then wet etched using the first and second portions of the first dielectric material as a hard mask. Then a second dielectric layer is deposited. A first via mask and etch process is used to etch vias down to the underlying portions of the resistor protect layer over the ends of the thin film resistor. A second via mask and etch process is used to etch substrate vias to an underlying conductor layer.

    摘要翻译: 公开了一种具有由介电掩模限定的端盖的掩埋薄膜电阻器。 在集成电路基板上形成薄膜电阻。 在薄膜电阻上形成电阻保护层。 第一介电材料的第一和第二部分形成在薄膜电阻器的第一和第二端上的电阻器保护层上。 然后使用第一介电材料的第一和第二部分作为硬掩模来湿式蚀刻电阻器保护层。 然后沉积第二介电层。 使用第一通孔掩模和蚀刻工艺将通孔蚀刻到薄膜电阻器端部上的电阻器保护层的下面部分。 使用第二通孔掩模和蚀刻工艺将衬底通孔蚀刻到下面的导体层。

    System and method for providing a dual via architecture for thin film resistors
    2.
    发明授权
    System and method for providing a dual via architecture for thin film resistors 有权
    为薄膜电阻提供双通道架构的系统和方法

    公开(公告)号:US07410879B1

    公开(公告)日:2008-08-12

    申请号:US11196787

    申请日:2005-08-03

    IPC分类号: H01L21/20

    CPC分类号: H01L28/20 H01L28/24

    摘要: A buried thin film resistor having end caps defined by a dielectric mask is disclosed. A thin film resistor is formed on an integrated circuit substrate. A resistor protect layer is formed over the thin film resistor. First and second portions of a first dielectric material are formed over the resistor protect layer over the first and second ends of the thin film resistor. The resistor protect layer is then wet etched using the first and second portions of the first dielectric material as a hard mask. Then a second dielectric layer is deposited. A first via mask and etch process is used to etch vias down to the underlying portions of the resistor protect layer over the ends of the thin film resistor. A second via mask and etch process is used to etch substrate vias to an underlying conductor layer.

    摘要翻译: 公开了一种具有由介电掩模限定的端盖的掩埋薄膜电阻器。 在集成电路基板上形成薄膜电阻。 在薄膜电阻上形成电阻保护层。 第一介电材料的第一和第二部分形成在薄膜电阻器的第一和第二端上的电阻器保护层上。 然后使用第一介电材料的第一和第二部分作为硬掩模来湿式蚀刻电阻器保护层。 然后沉积第二介电层。 使用第一通孔掩模和蚀刻工艺将通孔蚀刻到薄膜电阻器端部上的电阻器保护层的下面部分。 使用第二通孔掩模和蚀刻工艺将衬底通孔蚀刻到下面的导体层。

    System and method for providing a buried thin film resistor having end caps defined by a dielectric mask
    3.
    发明授权
    System and method for providing a buried thin film resistor having end caps defined by a dielectric mask 有权
    用于提供具有由介电掩模限定的端盖的掩埋薄膜电阻器的系统和方法

    公开(公告)号:US07332403B1

    公开(公告)日:2008-02-19

    申请号:US11179022

    申请日:2005-07-11

    IPC分类号: H01L21/20

    CPC分类号: H01L28/20

    摘要: A buried thin film resistor having end caps defined by a dielectric mask is disclosed. A thin film resistor is formed on an integrated circuit substrate. A resistor protect layer is formed over the thin film resistor. A layer of dielectric material is formed over the resistor protect layer. The dielectric material is masked and dry etched to leave a first portion of dielectric material over a first end of the thin film resistor and a second portion of dielectric material over a second end of the thin film resistor. The resistor protect layer is then wet etched using the first and second portions of the dielectric material as a hard mask. Then a second dielectric layer is deposited and vias are etched down to the underlying portions of the resistor protect layer.

    摘要翻译: 公开了一种具有由介电掩模限定的端盖的掩埋薄膜电阻器。 在集成电路基板上形成薄膜电阻。 在薄膜电阻上形成电阻保护层。 电介质材料层形成在电阻器保护层上。 电介质材料被掩蔽和干蚀刻以在薄膜电阻器的第一端上方留下电介质材料的第一部分,并且在薄膜电阻器的第二端上延伸第二部分电介质材料。 然后使用电介质材料的第一和第二部分作为硬掩模来湿式蚀刻电阻器保护层。 然后沉积第二电介质层,并将通孔蚀刻到电阻器保护层的下面部分。

    System and method for providing a buried thin film resistor having end caps defined by a dielectric mask
    4.
    发明授权
    System and method for providing a buried thin film resistor having end caps defined by a dielectric mask 有权
    用于提供具有由介电掩模限定的端盖的掩埋薄膜电阻器的系统和方法

    公开(公告)号:US07808048B1

    公开(公告)日:2010-10-05

    申请号:US11974647

    申请日:2007-10-15

    IPC分类号: H01L23/62

    CPC分类号: H01L28/20

    摘要: A buried thin film resistor having end caps defined by a dielectric mask is disclosed. A thin film resistor is formed on an integrated circuit substrate. A resistor protect layer is formed over the thin film resistor. A layer of dielectric material is formed over the resistor protect layer. The dielectric material is masked and dry etched to leave a first portion of dielectric material over a first end of the thin film resistor and a second portion of dielectric material over a second end of the thin film resistor. The resistor protect layer is then wet etched using the first and second portions of the dielectric material as a hard mask. Then a second dielectric layer is deposited and vias are etched down to the underlying portions of the resistor protect layer.

    摘要翻译: 公开了一种具有由介电掩模限定的端盖的掩埋薄膜电阻器。 在集成电路基板上形成薄膜电阻。 在薄膜电阻上形成电阻保护层。 电介质材料层形成在电阻器保护层上。 电介质材料被掩蔽和干蚀刻以在薄膜电阻器的第一端上方留下电介质材料的第一部分,并且在薄膜电阻器的第二端上延伸第二部分电介质材料。 然后使用电介质材料的第一和第二部分作为硬掩模来湿式蚀刻电阻器保护层。 然后沉积第二介电层,并将通孔蚀刻到电阻器保护层的下面部分。