公开(公告)号：US07366207B1

公开(公告)日：2008-04-29

申请号：US10368251

申请日：2003-02-18

申请人： Rohit Vaishnav ,  Ravi Kumar

发明人： Rohit Vaishnav ,  Ravi Kumar

IPC分类号： H04J3/06

CPC分类号： H04J3/062

摘要： A receiver for high-speed indirect synchronous digital data transmission includes an elastic buffer receiving an incoming data stream containing embedded timing information preceding a data sequence, generating a recovered clock from the timing information, initially synchronizing the frequency of a local clock to the recovered clock, and accommodating subsequent drift between the recovered and local clocks across the duration of the data sequence while tolerating clock jitter. Received data is clocked into a FIFO buffer within the elastic buffer based on the recovered clock and read out based upon the local clock, with the buffer expanding or contracting by adjustment of an index to accommodate skew of greater than one clock period. Expansion or contraction of the FIFO buffer is disabled during periods when clock jitter is likely, such as periods immediately following an index change.

摘要翻译： 用于高速间接同步数字数据传输的接收机包括弹性缓冲器，接收包含在数据序列之前的嵌入定时信息的输入数据流，从定时信息产生恢复的时钟，最初将本地时钟的频率同步到恢复的时钟 并且在数据序列的持续时间内容纳恢复和本地时钟之间的随后漂移，同时容忍时钟抖动。 接收到的数据基于恢复的时钟被计入弹性缓冲器内的FIFO缓冲器中，并且基于本地时钟读出，缓冲器通过调整索引来扩展或收缩以适应大于一个时钟周期的偏移。 在时钟抖动很可能的时段（例如紧随着索引改变之后的周期），FIFO缓冲器的扩展或缩小被禁用。