公开(公告)号：US20080209426A1

公开(公告)日：2008-08-28

申请号：US12112859

申请日：2008-04-30

申请人： Ronald Nick Kalla ,  Minh Michelle Quy Pham ,  Ballarm Sinharoy ,  John Wesley Ward, III

发明人： Ronald Nick Kalla ,  Minh Michelle Quy Pham ,  Ballarm Sinharoy ,  John Wesley Ward, III

IPC分类号： G06F9/30

CPC分类号： G06F9/3851

摘要： A processor interleaves instructions according to a priority rule which determines the frequency with which instructions from each respective thread are selected and added to an interleaved stream of instructions to be processed in the data processor. The frequency with which each thread is selected according to the rule may be based on the priorities assigned to the instruction threads. A randomization is inserted into the interleaving process so that the selection of an instruction thread during any particular clock cycle is not based solely by the priority rule, but is also based in part on a random or pseudo random element. This randomization is inserted into the instruction thread selection process so as to vary the order in which instructions are selected from the various instruction threads while preserving the overall frequency of thread selection (i.e. how often threads are selected) set by the priority rule.

摘要翻译： A处理器根据优先级规则对指令进行交织，该优先级规则确定选择来自每个相应线程的指令的频率，并将其附加到要在数据处理器中处理的交错指令流。 根据规则选择每个线程的频率可以基于分配给指令线程的优先级。 随机化被插入到交织处理中，使得在任何特定时钟周期期间指令线程的选择不仅仅基于优先级规则，而且还部分地基于随机或伪随机元素。 该随机化被插入到指令线程选择处理中，以便改变从各种指令线程中选择指令的顺序，同时保持由优先级规则设置的线程选择的总体频率（即选择多少线程）。