DISPLAY DEVICE
    1.
    发明申请

    公开(公告)号:US20220375400A1

    公开(公告)日:2022-11-24

    申请号:US17657807

    申请日:2022-04-04

    IPC分类号: G09G3/32

    摘要: A display device includes a display panel having first and second display areas. A data driver provides data and bias voltages to data lines. A timing controller controls the data driver and a scan driver based on at least two operation modes. The first mode drives the first and second display areas at a normal frequency, and the second mode drives the first display area at a first frequency substantially equal to or lower than the normal frequency and the second display area at a second frequency lower than the first frequency. The second mode includes an active frame to write a reference voltage to display a black image in the second display area, and blank frames to maintain the reference voltage and apply the bias voltage to the pixels in the second display area. The data driver varies the bias voltage in the blank frames.

    DISPLAY DEVICE
    2.
    发明申请

    公开(公告)号:US20210027697A1

    公开(公告)日:2021-01-28

    申请号:US16829954

    申请日:2020-03-25

    IPC分类号: G09G3/32

    摘要: A display device includes a timing controller configured to generate clock signals, a start signal, and image data. A scan driver includes a plurality of stages configured to sequentially output the clock signals as scan signals in response to the start signal. A data driver configured to generate a data signal based on the image data. A display unit includes pixels configured to emit light with luminance corresponding to the data signal in response to the scan signal. The timing controller is to mask at least one of the clock signals in a first section, a second section, and a third section included in one frame section and spaced from each other.

    DISPLAY DEVICE
    3.
    发明申请

    公开(公告)号:US20220139305A1

    公开(公告)日:2022-05-05

    申请号:US17576768

    申请日:2022-01-14

    IPC分类号: G09G3/32

    摘要: A display device includes a timing controller configured to generate clock signals, a start signal, and image data. A scan driver includes a plurality of stages configured to sequentially output the clock signals as scan signals in response to the start signal. A data driver configured to generate a data signal based on the image data. A display unit includes pixels configured to emit light with luminance corresponding to the data signal in response to the scan signal. The timing controller is to mask at least one of the clock signals in a first section, a second section, and a third section included in one frame section and spaced from each other.