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公开(公告)号：US11037517B2
公开(公告)日：2021-06-15
申请号：US16666054
申请日：2019-10-28
发明人： Junghwan Hwang , Chanwook Shim , Youngchul Jo
IPC分类号： G09G3/36
摘要： A display device to display an image during frame intervals, and to display a blank image during a blank interval defined between the frame intervals, includes: a gate driving circuit including a plurality of stages, an ith stage (i is an integer greater than or equal to 2) from among the plurality of stages including a clock terminal to receive a clock signal, wherein the clock signal swings between a first clock voltage and a second clock voltage smaller than the first clock voltage during a normal interval corresponding to each of the frame intervals, and the clock signal is changed to a voltage lower than the second clock voltage during a stabilization interval corresponding to the blank interval.
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公开(公告)号：US10460691B2
公开(公告)日：2019-10-29
申请号：US15162499
申请日：2016-05-23
发明人： Junghwan Hwang , Chanwook Shim , Youngchul Jo
IPC分类号： G09G3/36
摘要： A display device to display an image during frame intervals, and to display a blank image during a blank interval defined between the frame intervals, includes: a gate driving circuit including a plurality of stages, an ith stage (i is an integer greater than or equal to 2) from among the plurality of stages including a clock terminal to receive a clock signal, wherein the clock signal swings between a first clock voltage and a second clock voltage smaller than the first clock voltage during a normal interval corresponding to each of the frame intervals, and the clock signal is changed to a voltage lower than the second clock voltage during a stabilization interval corresponding to the blank interval.
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公开(公告)号：US20200066224A1
公开(公告)日：2020-02-27
申请号：US16666054
申请日：2019-10-28
发明人： Junghwan Hwang , Chanwook Shim , Youngchul Jo
IPC分类号： G09G3/36
摘要： A display device to display an image during frame intervals, and to display a blank image during a blank interval defined between the frame intervals, includes: a gate driving circuit including a plurality of stages, an ith stage (i is an integer greater than or equal to 2) from among the plurality of stages including a clock terminal to receive a clock signal, wherein the clock signal swings between a first clock voltage and a second clock voltage smaller than the first clock voltage during a normal interval corresponding to each of the frame intervals, and the clock signal is changed to a voltage lower than the second clock voltage during a stabilization interval corresponding to the blank interval.
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公开(公告)号：US20170084245A1
公开(公告)日：2017-03-23
申请号：US15162499
申请日：2016-05-23
发明人： Junghwan Hwang , Chanwook Shim , Youngchul Jo
IPC分类号： G09G3/36
摘要： A display device to display an image during frame intervals, and to display a blank image during a blank interval defined between the frame intervals, includes: a gate driving circuit including a plurality of stages, an ith stage (i is an integer greater than or equal to 2) from among the plurality of stages including a clock terminal to receive a clock signal, wherein the clock signal swings between a first clock voltage and a second clock voltage smaller than the first clock voltage during a normal interval corresponding to each of the frame intervals, and the clock signal is changed to a voltage lower than the second clock voltage during a stabilization interval corresponding to the blank interval.
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