公开(公告)号：US20240422963A1

公开(公告)日：2024-12-19

申请号：US18604584

申请日：2024-03-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： KYO-SUK CHAE ,  Tai Uk Rim ,  Jin-seong Lee ,  Hee Jae Choi ,  Jung-Hoon Han ,  Byung Ha Kang ,  Gyu Taek Shin ,  Shin Woo Jeong

IPC: H10B12/00

Abstract: A semiconductor memory device includes a substrate including a device isolation film defining active regions; and cell gate structures in trenches, including first areas and second areas, the cell gate structures extending to intersect the active regions, each of the cell gate structures includes a cell gate insulating layer, extending along inner sidewalls of the trenches, a first gate dielectric film, on sidewalls of the cell gate insulating layer, in a first area of the trench, a second gate dielectric film, on the sidewalls of the cell gate insulating layer, in a second area of the trench, and a cell gate electrode structure, including a first gate electrode layer on sidewalls of the first gate dielectric film and a second gate electrode layer on sidewalls of the second gate dielectric film in the second area.