公开(公告)号：US20240120276A1

公开(公告)日：2024-04-11

申请号：US18227113

申请日：2023-07-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae Seung CHOI ,  Byung-Su KIM ,  Bong Il PARK ,  Chang Seok KWAK ,  Sun Hee PARK ,  Sang Joon CHEON

IPC: H01L23/528 ,  H01L23/498 ,  H01L23/522 ,  H01L27/06

CPC classification number: H01L23/5283 ,  H01L23/49816 ,  H01L23/5226 ,  H01L27/0688

Abstract: A three-dimensional semiconductor integrated circuit device including an inter-die interface is provided. The device includes a top die including a plurality of micro cells provided on a top surface of the top die, a plurality of micro bumps provided on a bottom surface of the top die, and wiring patterns connecting the plurality of micro cells to the plurality of micro bumps; and a bottom die including a plurality of macro cells provided on a top surface thereof, wherein the plurality of macro cells are electrically connected to the plurality of micro bumps, respectively, wherein a size of a region in which the plurality of micro cells are provided is smaller than a size of a region in which the plurality of micro bumps are provided.