公开(公告)号：US20240135682A1

公开(公告)日：2024-04-25

申请号：US18377649

申请日：2023-10-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chan-Hyun Youn ,  Taewoo Kim ,  Changha Lee ,  Minsu Jeon

IPC: G06V10/771 ,  G06V10/764 ,  G06V20/13

CPC classification number: G06V10/771 ,  G06V10/764 ,  G06V20/13

Abstract: An electronic device includes a memory configured to store at least one instruction; and at least one processor configured to execute the at least one instruction to: input first data to a first artificial intelligence model including a plurality of convolution blocks sequentially connected with a pooling layer interposed therebetween to obtain a plurality of feature maps that are output by corresponding ones of the plurality of convolution blocks, input the first data and the plurality of feature maps to a second artificial intelligence model including a plurality of local attention blocks sequentially connected to obtain a plurality of attention maps that are output by corresponding ones of the plurality of local attention blocks, output an amplified feature map by amplifying a region corresponding to a last attention map among the plurality of attention maps in a last feature map among the plurality of feature maps, and input the amplified feature map to a classifier to output a classification result for the first data.