公开(公告)号：US20230232640A1

公开(公告)日：2023-07-20

申请号：US17931116

申请日：2022-09-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JINWOO LEE ,  DONGHO AHN ,  DONGGEON GU ,  WONJUN PARK ,  CHANGYUP PARK

IPC: H01L27/24 ,  H01L45/00

CPC classification number: H01L27/249 ,  H01L45/1683

Abstract: A variable resistance memory device includes a stacking pattern disposed on a substrate, a vertical structure extends in a first direction, which is perpendicular to a top surface of the substrate, and penetrates the stacking pattern, and a horizontal conductive line disposed adjacent to the stacking pattern and extending in a second direction that is parallel to the top surface of the substrate. The vertical structure includes a vertical conductive line penetrating the stacking pattern, a variable resistance element enclosing the vertical conductive line, and a selection element interposed between the vertical conductive line and the variable resistance element. Each of the vertical conductive line, the variable resistance element, and the selection element extends in the first direction. The stacking pattern is electrically connected to the horizontal conductive line and extends along the horizontal conductive line and in the second direction.