公开(公告)号：US20250120099A1

公开(公告)日：2025-04-10

申请号：US18736967

申请日：2024-06-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： MINWOO LEE ,  BYOUNGKON JO ,  DUK SUNG KIM ,  JOONHO JUN ,  DOOHEE HWANG

IPC: H10B80/00 ,  H01L25/065 ,  H01L25/18

Abstract: A memory device includes: first and second core dies that include a plurality of memory cells and are stacked in a first direction, and a buffer die that is stacked with the first and second core dies in the first direction and includes a first physical layer and a second physical layer, wherein the buffer die is configured to output data of the plurality of memory cells through the first physical layer, wherein the data of the plurality of memory cells is provided from the first and second core dies through through-vias that pass through the first and second core dies in the first direction, and wherein the second physical layer is separated from the first physical layer and is configured to receive power signals from outside.

公开(公告)号：US20220165321A1

公开(公告)日：2022-05-26

申请号：US17399349

申请日：2021-08-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JEONGSEOK SEO ,  KWANGHYUN KIM ,  CHIKOOK KIM ,  SEUNGWOO RYU ,  DOOHEE HWANG

IPC: G11C11/4072 ,  H01L25/065

Abstract: A semiconductor memory device includes an external resistor provided on a board and a plurality of memory dies mounted on the board, designated as a master die and slave dies. The memory dies are commonly connected to the external resistor. The master die performs a first impedance calibration operation during an initialization sequence of the semiconductor memory device and stores, in a first register set therein, first calibration data, a first voltage and a first temperature. Each of the slave dies, after the first impedance calibration operation is completed, performs a second impedance calibration operation during the initialization sequence and stores, in a second register set therein, second calibration data associated with the second impedance calibration operation and offset data corresponding to a difference between the first calibration data and the second calibration data.