公开(公告)号：US20230049283A1

公开(公告)日：2023-02-16

申请号：US17730551

申请日：2022-04-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyounglim SUK ,  Daewoo Kim ,  Seokhyun Lee

IPC: H01L23/00 ,  H01L21/768 ,  H01L21/56

Abstract: A method of manufacturing a semiconductor package includes: hybrid-bonding a semiconductor chip, including a through-silicon via, to an upper surface of a semiconductor wafer, wet-etching a surface of the semiconductor chip to expose the through-silicon via, covering the exposed through-silicon via with a material, including an organic resin and an inorganic filler, to form an encapsulation layer, removing an upper surface of the encapsulation layer to expose the through-silicon via, and forming a redistribution structure electrically connected to the through-silicon via.