公开(公告)号：US20130320405A1

公开(公告)日：2013-12-05

申请号：US13785156

申请日：2013-03-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joong-Won JEON ,  Hee-Sung KANG ,  Dae-Ho YOON ,  Dal-Hee LEE ,  Suk-Joo LEE

IPC: H01L27/02

CPC classification number: H01L27/0207 ,  H01L29/94

Abstract: A semiconductor device includes a logic region disposed in a central region of the semiconductor device, and a peripheral region disposed in an outer region thereof. The logic region includes a line-shaped logic transistor and a box-shaped decoupling capacitor. The peripheral region includes a line-shaped peripheral transistor and a line-shaped peripheral dummy transistor disposed adjacent to the peripheral transistor.

Abstract translation: 半导体器件包括布置在半导体器件的中心区域中的逻辑区域和设置在其外部区域中的周边区域。 逻辑区域包括线形逻辑晶体管和盒形去耦电容器。 周边区域包括线形外围晶体管和与外围晶体管相邻设置的线状外围虚拟晶体管。