Refresh control circuit, memory device including the same and method of operating the same for hammer refresh operation

    公开(公告)号:US10811077B2

    公开(公告)日:2020-10-20

    申请号:US16235638

    申请日:2018-12-28

    Abstract: A memory device a plurality of memory banks, a hammer address manager, and a refresh controller. The hammer address manager manages access addresses with respect to the plurality of memory banks and provides a hammer address for a hammer refresh operation among the access addresses, the hammer address being the access address that is accessed more than other access addresses. The refresh controller generates a hammer refresh address signal based on the hammer address, the hammer refresh address signal corresponding to a row that is physically adjacent to a row corresponding to the hammer address such that the row physically adjacent to the row corresponding to the hammer address is refreshed by the hammer refresh operation.

Patent Agency Ranking