公开(公告)号：US20210399003A1

公开(公告)日：2021-12-23

申请号：US17149967

申请日：2021-01-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Donghyun SHIN ,  Minkyu KANG ,  Seorim MOON ,  Seunggi MIN ,  Sungmin PARK ,  Jongmin LEE

IPC: H01L27/11573 ,  H01L23/535 ,  H01L27/11582 ,  H01L21/768

Abstract: A three-dimensional semiconductor memory device includes a peripheral circuit structure, a cell array structure above the peripheral circuit structure, and peripheral contact via structures connecting the cell array structure to the peripheral circuit structure, the peripheral contact via structures including a first peripheral contact via structure in a first through region in the peripheral circuit structure, and a second peripheral contact via structure in a second through region in the peripheral circuit structure, the second through region being spaced apart from the first through region above the peripheral circuit structure, and a difference between a second critical dimension of the second peripheral contact via structure and a first critical dimension of the first peripheral contact via structure being differently configured according to material layers included in the second through region and the first through region.