公开(公告)号：US20230026976A1

公开(公告)日：2023-01-26

申请号：US17592629

申请日：2022-02-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sun Young Noh ,  Eui Bok Lee ,  Wan Don Kim ,  Han Min Jang

IPC: H01L21/768 ,  H01L23/532 ,  H01L23/522

Abstract: A semiconductor device includes: a substrate; a first interlayer insulating layer on the substrate; a first wiring pattern in a first trench of the first interlayer insulating layer; a second interlayer insulating layer on the first interlayer insulating layer; a second wiring pattern in a second trench of the second interlayer insulating layer; a third interlayer insulating layer on the second interlayer insulating layer; a third wiring pattern in a third trench of the third interlayer insulating layer, and including a wiring barrier layer and a wiring filling layer, wherein the wiring filling layer contacts the third interlayer insulating layer; a via trench extending from the first wiring pattern to the third trench; and a via including a via barrier layer and a via filling layer. The via barrier layer is in the via trench. The via filling layer contacts the first wiring pattern and the wiring filling layer.