公开(公告)号：US10461033B2

公开(公告)日：2019-10-29

申请号：US16044719

申请日：2018-07-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong-Joo Lee ,  Hee-woo An

IPC: H01L23/52 ,  H01L23/538 ,  H01L23/00 ,  H01L25/065

Abstract: A semiconductor memory package is provided. The package includes a base substrate, and chip connection pads and external connection pads respectively arranged on upper and lower surfaces of the base substrate; and two semiconductor memory chips mounted on the base substrate each having chip pads electrically connected to the chip connection pads. A first electrical path extends from an external connection pad to a first chip pad of one of the chips and a second electrical path extends from the external connection pad to a second chip pad of another chip, the first and second electrical paths have a common line, and the first electrical path has a first branch line and the second electrical path has a second branch line. The base substrate includes an open stub extending from the common line and having an end which is open without being connected to another electrical path.