公开(公告)号：US20140006646A1

公开(公告)日：2014-01-02

申请号：US13791153

申请日：2013-03-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young-Jin Cho ,  Ho-Ha Kim

IPC: G06F13/12

CPC classification number: G06F13/126 ,  G06F3/0679 ,  G06F13/385

Abstract: A semiconductor device includes a delay unit determining a delay value. A FIS (Frame Information Structure) receiver is connected to a transfer channel and receives a first H2D (Host to Device) FIS including first command information. A FIS generator is connected to a receiving channel and successively outputs a first DMA (Direct Memory Access) setup FIS, a first data FIS, and a first SDB (Set Device Bits) FIS after outputting a first D2H (Device to Host) FIS in response to the first H2D FIS, and to insert a delay period as large as the delay value next to the first data FIS or the first SDB FIS.

Abstract translation: 半导体器件包括确定延迟值的延迟单元。 FIS（帧信息结构）接收器连接到传送信道并接收包括第一命令信息的第一H2D（主机到设备）FIS。 FIS发生器连接到接收通道，并在输出第一个D2H（设备到主机）FIS之后，依次输出第一个DMA（直接存储器访问）设置FIS，第一个数据FIS和第一个SDB（设置设备位）FIS 响应于第一个H2D FIS，并且插入与第一数据FIS或第一SDB FIS旁边的延迟值一样大的延迟周期。