公开(公告)号：US10754724B2

公开(公告)日：2020-08-25

申请号：US16122146

申请日：2018-09-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hui Chung Byun ,  Yoen Hwa Lee ,  Seung Hun Lee

IPC: G06F11/00 ,  G06F11/10 ,  G11C29/00 ,  G11C29/44 ,  G11C7/10

Abstract: A memory device includes a plurality of memory chips storing and outputting data in response to a control command and an address command, at least one ECC memory chip providing an error check and correction (ECC) function on the data stored and output by the plurality of the memory chips, and a controller, marking a memory chip in which a defective memory cell is detected among the plurality of memory chips, as a defective memory chip, storing data of the defective memory chip in the ECC memory chip, and controlling the defective memory chip to execute a post package repair (PPR).

公开(公告)号：US11314590B2

公开(公告)日：2022-04-26

申请号：US16934788

申请日：2020-07-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hui Chung Byun ,  Yoen Hwa Lee ,  Seung Hun Lee

IPC: G11C29/00 ,  G06F11/10 ,  G11C29/44 ,  G11C7/10

Abstract: A memory device includes a plurality of memory chips storing and outputting data in response to a control command and an address command, at least one ECC memory chip providing an error check and correction (ECC) function on the data stored and output by the plurality of the memory chips, and a controller, marking a memory chip in which a defective memory cell is detected among the plurality of memory chips, as a defective memory chip, storing data of the defective memory chip in the ECC memory chip, and controlling the defective memory chip to execute a post package repair (PPR).