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公开(公告)号:US20250030424A1
公开(公告)日:2025-01-23
申请号:US18778139
申请日:2024-07-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yongwoo Kim , Kyeongjoon Ko , Hurham Lee
IPC: H03K19/0948 , H03K19/0185
Abstract: A complementary metal oxide semiconductor (CMOS)-to-current mode logic (CML) converter for converting a CMOS input signal into a CML output signal, including: a low-pass filter comprising a fixed resistor and a first fixed capacitor, and a swing width control circuit configured to adjust a swing width of a voltage swing of the CML output signal based on a common mode level, wherein the swing width control circuit includes: a second fixed capacitor; and a variable capacitor comprising a capacitor array.