公开(公告)号：US10431320B2

公开(公告)日：2019-10-01

申请号：US15394973

申请日：2016-12-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyung-Shin Kwon ,  Jong-Hyoung Lim ,  Chang-Soo Lee ,  Chung-Ki Lee

IPC: G11C29/12 ,  G11C8/08 ,  G11C16/34 ,  G11C29/08 ,  G11C29/10 ,  G11C29/18 ,  G11C7/12

Abstract: A method of testing a semiconductor memory device is provided. Data is written to a plurality of memory cells disposed in a memory cell block of the semiconductor memory device. A first driving voltage is applied to a first group of word lines. A second driving voltage is applied to a second group of word lines. Each word line of the first group of the word lines is interposed between two neighboring word lines of the second group of the word lines. The first driving voltage has a voltage level different from that of the second driving voltage. The data is read from first memory cells coupled to the first group to determine whether each of the first memory cells is defective.