公开(公告)号：US10049943B2

公开(公告)日：2018-08-14

申请号：US15171120

申请日：2016-06-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-Hyun Yeo ,  Jae-Suk Kwon ,  Kwang-Woo Lee ,  Eun-Seong Lee

IPC: H01L21/8238 ,  H01L21/265 ,  H01L21/324 ,  H01L29/66

Abstract: A method of manufacturing a semiconductor device includes forming a first gate structure on a substrate, the first gate structure including a gate insulation layer, a gate electrode, and a hard mask sequentially stacked on the substrate, forming a preliminary spacer layer on sidewalls of the first gate structure and the substrate, the preliminary spacer layer including silicon nitride, implanting molecular ions into the preliminary spacer layer to form a spacer layer having a dielectric constant lower than a dielectric constant of the preliminary spacer layer, anisotropically etching the spacer layer to form spacers on the sidewalls of the first gate structure, and forming impurity regions at upper portions of the substrate adjacent to the first gate structure.