公开(公告)号：US20220158640A1

公开(公告)日：2022-05-19

申请号：US17503791

申请日：2021-10-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyunchul HWANG ,  Minsu KIM ,  Janghwan YOON

IPC: H03K19/096 ,  H03K19/20

Abstract: An integrated circuit includes a first circuit, a second circuit, and an inverter. The first circuit receives a first input signal, an inverted clock signal, a first logic level of a first output node, and a logic level of a second output node to determine a second logic level of a first output node. The second circuit receives the first input signal, the clock signal, the first logic level, and the second logic level to determine a logic level of the second output node. The inverter receives a second input signal to output the inverted second input signal to the first circuit or the second circuit. A logic level of the first output node or a logic level of the second output node is output as an output signal when a logic level of the clock signal is a first logic level.