公开(公告)号：US11195997B2

公开(公告)日：2021-12-07

申请号：US16826778

申请日：2020-03-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junhwan Paik ,  Yongjin Park ,  Jinwook Yang ,  Gyuhwan Oh ,  Jiyoon Chung

IPC: H01L47/00 ,  H01L45/00 ,  H01L23/528 ,  H01L27/24

Abstract: A variable resistance memory device includes a first conductive line structure having an adiabatic line therein on a substrate, a variable resistance pattern contacting an upper surface of the first conductive line structure, a low resistance pattern contacting an upper surface of the variable resistance pattern, a selection structure on the low resistance pattern, and a second conductive line on the selection structure.

公开(公告)号：US11502132B2

公开(公告)日：2022-11-15

申请号：US17158287

申请日：2021-01-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinwook Yang ,  Gyuhwan Oh ,  Junhwan Paik ,  Jiyoon Chung

IPC: H01L27/24 ,  H01L45/00

Abstract: A semiconductor memory device including a substrate; a first conductive line on the substrate and extending in a first direction that is parallel to an upper surface of the substrate; a second conductive line extending in a second direction that intersects the first direction; a memory cell between the conductive lines and including a lower electrode pattern, a data storage element, an intermediate electrode pattern, a switching element, and an upper electrode pattern sequentially stacked on the first conductive line; and a sidewall spacer on a side surface of the memory cell, wherein the side surface of the memory cell includes a first concave portion at a side surface of the switching element, and the sidewall spacer includes a first portion on a side surface of the upper electrode pattern, and a second portion on the first concave portion, the second portion being thicker than the first portion.