公开(公告)号：US20200020637A1

公开(公告)日：2020-01-16

申请号：US16432551

申请日：2019-06-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JI HWANG KIM ,  KILSOO KIM ,  JONGBO SHIM ,  JANGWOO LEE ,  EUNHEE JUNG

IPC: H01L23/538 ,  H01L23/498 ,  H01L23/00

Abstract: A semiconductor package includes a substrate, a semiconductor chip mounted on the substrate, an interposer chip on the semiconductor chip and including a redistribution pattern, a first pad on the interposer chip, a second pad on the interposer chip and spaced apart from the first pad, and a bonding wire electrically connected to the second pad and the first substrate. The second pad is electrically connected through the redistribution pattern to the first pad. The footprint of the interposer chip is greater than the footprint of the first semiconductor chip.

公开(公告)号：US20190295986A1

公开(公告)日：2019-09-26

申请号：US16164524

申请日：2018-10-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： SEONG HWAN OH ,  Kyung Suk OH ,  KILSOO KIM

IPC: H01L25/065 ,  H01L21/78 ,  H01L23/00

Abstract: A semiconductor package may include a package substrate, a first semiconductor chip on the package substrate, and a second semiconductor chip on the first semiconductor chip. The first semiconductor chip comprises a chip substrate including a first surface and a second surface opposite to the first surface, a plurality of first chip pads between the package substrate and the chip substrate, and electrically connecting the first semiconductor chip to the package substrate, a plurality of second chip pads disposed on the second surface and between the second semiconductor chip and the second surface, and a plurality of redistribution lines on the second surface, the redistribution lines electrically connecting to the second semiconductor chip, and a plurality of bonding wires electrically connecting the redistribution lines to the package substrate.