公开(公告)号：US20250118671A1

公开(公告)日：2025-04-10

申请号：US18643761

申请日：2024-04-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Su Hyun Bark ,  Jun Sung Kim ,  Kyeong Beom Park ,  Jong Min Baek

IPC: H01L23/528 ,  H01L21/768 ,  H01L23/522 ,  H01L23/532

Abstract: A semiconductor device includes a substrate; an interlayer insulating layer disposed on the substrate; an upper wiring trench disposed in the interlayer insulating layer; and an upper wiring layer including: an upper wiring barrier layer disposed along a sidewall and a bottom surface of the upper wiring trench, an upper wiring filling layer disposed on the upper wiring barrier layer so as to fill at least a portion of an inside of the upper wiring trench, and an upper wiring capping layer disposed on an upper surface of the upper wiring filling layer, wherein the upper wiring capping layer includes cobalt (Co), and wherein a volume percentage of a crystal structure having a hexagonal close-packed structure included in the upper wiring capping layer is in a range of about 80% to about 100%.