公开(公告)号：US20190318230A1

公开(公告)日：2019-10-17

申请号：US16191906

申请日：2018-11-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： WOO-YEONG CHO ,  SEONG-IL O ,  HAK-SOO YU ,  MIN-SU CHOI

IPC: G06N3/063 ,  G06N3/04

Abstract: Provided are a neuromorphic circuit having a three-dimensional stack structure and a semiconductor device including the neuromorphic circuit. The semiconductor device includes a first semiconductor layer including one or more synaptic cores, each synaptic core including neural circuits arranged to perform neuromorphic computation. A second semiconductor layer is stacked on the first semiconductor layer and includes an interconnect forming a physical transfer path between synaptic cores. A third semiconductor layer is stacked on the second semiconductor layer and includes one or more synaptic cores. At least one through electrode is formed, through which information is transferred between the first through third semiconductor layers. Information from a first synaptic core in the first semiconductor layer is transferred to a second synaptic core in the third semiconductor layer via the one of more through electrodes and an interconnect of the second semiconductor layer.