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公开(公告)号:US20220108935A1
公开(公告)日:2022-04-07
申请号:US17354291
申请日:2021-06-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Eunseok CHO , Minjeong GU , Joonsung KIM , Jaehoon CHOI
IPC: H01L23/367 , H01L23/31 , H01L23/498 , H01L23/552 , H01L21/48 , H01L21/56 , H01L23/00 , H01L25/18 , H01L25/065
Abstract: A semiconductor package includes a base substrate including a wiring pattern, an interposer substrate including lower and upper redistribution patterns, a semiconductor structure, a heat dissipation structure, a plurality of external connection bumps disposed on a lower surface of the base substrate, a plurality of lower connection bumps disposed between the base substrate and the interposer substrate, and a plurality of upper connection bumps disposed between the interposer substrate and the semiconductor structure.
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公开(公告)号:US20250069979A1
公开(公告)日:2025-02-27
申请号:US18943337
申请日:2024-11-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Eunseok CHO , Minjeong GU , Joonsung KIM , Jaehoon CHOI
IPC: H01L23/367 , H01L21/48 , H01L21/56 , H01L23/00 , H01L23/31 , H01L23/498 , H01L23/552 , H01L25/065 , H01L25/18
Abstract: A method of manufacturing a semiconductor package is provided and includes: forming a lower redistribution structure, the lower redistribution structure including lower redistribution patterns having lower connection pads; forming an upper redistribution structure on a boundary surface of the lower redistribution structure, the upper redistribution structure including upper redistribution patterns having upper connection pads electrically connected to the lower connection pads; forming openings exposing at least a portion of each of the lower connection pads; disposing an interposer substrate, including the lower redistribution structure and the upper redistribution structure, on a base substrate, the lower connection pads of the interposer substrate electrically connected to wiring patterns of the base substrate through lower connection bumps disposed on the openings; and disposing at least one of semiconductor chips, including connection pads, on the interposer substrate, the connection pads electrically connected to the upper connection pads through upper connection bumps.
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