公开(公告)号：US20250062240A1

公开(公告)日：2025-02-20

申请号：US18611488

申请日：2024-03-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： MyungDo Cho ,  Youngchan Ko ,  Byung Ho Kim ,  Yongkoon Lee ,  Jeongho Lee

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L25/065

Abstract: An example semiconductor package includes a first redistribution layer, a bridge chip attached to a top surface of the first redistribution layer, a mold layer on the first redistribution layer and enclosing the bridge chip, a second redistribution layer disposed on the mold layer, a conductive post extending through the mold layer vertically and connecting the first redistribution layer and the second redistribution layer, and a first semiconductor chip mounted on the second redistribution layer. The first redistribution layer includes a pad layer and an interconnection layer disposed on the pad layer. The pad layer includes a first insulating layer and pads in the first insulating layer. Top surfaces of the pads are exposed to an outside of a top surface of the first insulating layer, and bottom surfaces of the pads are exposed to an outside of a bottom surface of the first insulating layer.