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公开(公告)号:US20250167155A1
公开(公告)日:2025-05-22
申请号:US18785840
申请日:2024-07-26
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: SEUNGSOO HA , Seunggeol RYU , YUN-HEE LEE , Yiseul HAN
Abstract: A semiconductor package may include a lower redistribution layer, a first semiconductor chip on the lower redistribution layer, a second semiconductor chip on the first semiconductor chip, under-bump patterns between the first semiconductor chip and the second semiconductor chip, and connection terminals between the under-bump patterns and the second semiconductor chip. The under-bump patterns may include a first under-bump pattern connected to two of the connection terminals and a second under-bump pattern connected to one of the connection terminals. A power or ground voltage of the second semiconductor chip may be applied through the first under-bump pattern.
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公开(公告)号:US20230130453A1
公开(公告)日:2023-04-27
申请号:US17827018
申请日:2022-05-27
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: SEOKBEOM YONG , DONGCHUL YANG , YUNHEE LEE , SEUNGSOO HA
IPC: H01L23/498 , H01L25/10 , H01L25/18
Abstract: Provided is a semiconductor package with high reliability signal characteristics and a memory module including the semiconductor package. The semiconductor package includes a package substrate, a semiconductor chip mounted on the package substrate, and connection terminals arranged on a lower surface of the package substrate. The connection terminals are arranged in a two-dimensional array structure in a first direction and a second direction perpendicular to the first direction, and two adjacent terminals with a shortest distance therebetween among data signal (DQ) terminals and command and address signal (CA) terminals included in the connection terminals are arranged in a diagonal direction between the first direction and the second direction.
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