公开(公告)号：US20190180806A1

公开(公告)日：2019-06-13

申请号：US16274860

申请日：2019-02-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SU YEON DOO ,  SEUNGJUN BAE ,  SIHONG KIM ,  HOSUNG SONG

IPC: G11C8/18 ,  G11C7/22 ,  G11C11/4076 ,  G06F11/10 ,  G11C5/04

CPC classification number: G11C8/18 ,  G06F11/1004 ,  G11C5/04 ,  G11C7/22 ,  G11C11/4076 ,  G11C2029/0411

Abstract: A clock pattern generating method of a semiconductor memory device is provided. The method includes generating the same clock pattern through a plurality of detection clock output pins when an output selection control signal is in a first state and generating clock patterns different from each other through the plurality of detection clock output pins when the output selection control signal is in a second state different from the first state.

公开(公告)号：US20140086002A1

公开(公告)日：2014-03-27

申请号：US13828869

申请日：2013-03-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SU YEON DOO ,  SEUNGJUN BAE ,  SIHONG KIM ,  HOSUNG SONG

IPC: G11C8/18

CPC classification number: G11C8/18 ,  G06F11/1004 ,  G11C5/04 ,  G11C7/22 ,  G11C11/4076 ,  G11C2029/0411

Abstract: A clock pattern generating method of a semiconductor memory device is provided. The method includes generating the same clock pattern through a plurality of detection clock output pins when an output selection control signal is in a first state and generating clock patterns different from each other through the plurality of detection clock output pins when the output selection control signal is in a second state different from the first state.

Abstract translation: 提供了一种半导体存储器件的时钟图形生成方法。 该方法包括当输出选择控制信号处于第一状态时通过多个检测时钟输出引脚产生相同的时钟模式，并且当输出选择控制信号为 处于与第一状态不同的第二状态。