公开(公告)号：US20250040127A1

公开(公告)日：2025-01-30

申请号：US18910359

申请日：2024-10-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JIN A KIM ,  SUN YOUNG LEE ,  YONG KWAN KIM ,  JI YOUNG KIM ,  CHANG HYUN CHO

IPC: H10B12/00 ,  H01L21/66

Abstract: A method of fabricating a semiconductor device. A cell area and a core area are defined in a substrate. A bit line structure disposed in the cell area is provided. A gate structure disposed in the core area is provided, and a core capping film disposed on the gate structure is provided. A height of the core capping film is greater than a height of the bit line structure. A first contact film is formed on the bit line structure. A second contact film is formed on the core capping film. A mask is formed on the first contact film. An upper surface of the core capping film is exposed using the mask. The first contact film is etched until a height of the first contact film becomes less than a height of the bit line structure using an etching process. In the etching process, an etching rate for the first contact film is greater than etching rates for the bit line structure and the core capping film.

公开(公告)号：US20220399346A1

公开(公告)日：2022-12-15

申请号：US17821331

申请日：2022-08-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JIN A KIM ,  SUN YOUNG LEE ,  YONG KWAN KIM ,  JI YOUNG KIM ,  CHANG HYUN CHO

IPC: H01L27/108 ,  H01L21/66

Abstract: A method of fabricating a semiconductor device. A cell area and a core area is defined in a substrate. A bit line structure disposed in the cell area is provided. A gate structure disposed in the core area is provided, and a core capping film disposed on the gate structure is provided. A height of the core capping film is greater than a height of the bit line structure. A first contact film is formed on the bit line structure. A second contact film is formed on the core capping film. A mask is formed on the first contact film. An upper surface of the core capping film is exposed using the mask. The first contact film is etched until a height of the first contact film becomes less than a height of the bit line structure using an etching process. In the etching process, an etching rate for the first contact film is greater than etching rates for the bit line structure and the core capping film.

公开(公告)号：US20180358375A1

公开(公告)日：2018-12-13

申请号：US15869766

申请日：2018-01-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： LEE EUN KU ,  JAE HO JEONG ,  WOO SUNG YANG ,  JUNG HWAN LEE ,  IN SU NOH ,  SUN YOUNG LEE

IPC: H01L27/11582 ,  H01L27/11565 ,  H01L27/1157

Abstract: A semiconductor device can include a semiconductor substrate having a memory cell region and a pad region that is adjacent to the memory cell region, the pad region can include a first pad region, a second pad region between the memory cell region and the first pad region, and a buffer region that is between the first and second pad regions. A separation source structure can include a first portion and a second portion that are parallel to each other in a plan view of the semiconductor device. A first source structure and a second source structure can be disposed between the first and second portions of the separation source structure, where the first and second source structures can have end portions that oppose each other, the first source structure being disposed in the first pad region, and the second source structure being disposed in the second pad region. A gate group can be disposed in the memory cell region and the pad region between the first and second portions of the separation source structure, where each of the end portions of the first and second source structures has a planar shape, and a width of each end portion increases and then decreases as each of the end portions extends toward the other.

公开(公告)号：US20180166450A1

公开(公告)日：2018-06-14

申请号：US15718737

申请日：2017-09-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JIN A KIM ,  SUN YOUNG LEE ,  YONG KWAN KIM ,  JI YOUNG KIM ,  CHANG HYUN CHO

IPC: H01L27/108 ,  H01L21/66

CPC classification number: H01L27/10885 ,  H01L22/26 ,  H01L27/10814 ,  H01L27/10823 ,  H01L27/10852 ,  H01L27/10855 ,  H01L27/10876 ,  H01L27/10888 ,  H01L27/10897

Abstract: A method of fabricating a semiconductor device. A cell area and a core area is defined in a substrate. A bit line structure disposed in the cell area is provided. A gate structure disposed in the core area is provided, and a core capping film disposed on the gate structure is provided. A height of the core capping film is greater than a height of the bit line structure. A first contact film is formed on the bit line structure. A second contact film is formed on the core capping film. A mask is formed on the first contact film. An upper surface of the core capping film is exposed using the mask. The first contact film is etched until a height of the first contact film becomes less than a height of the bit line structure using an etching process. In the etching process, an etching rate for the first contact film is greater than etching rates for the bit line structure and the core capping film.