公开(公告)号：US11869569B2

公开(公告)日：2024-01-09

申请号：US17659475

申请日：2022-04-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang Kyu Kang ,  Jieun Shin ,  Hocheol Bang ,  Haewon Lee

IPC: G11C16/34 ,  G11C11/406 ,  G11C7/10 ,  G11C11/4076

CPC classification number: G11C11/40615 ,  G11C7/109 ,  G11C7/1063 ,  G11C11/4076 ,  G11C11/40622 ,  G11C16/3495 ,  G06F2212/1036

Abstract: A semiconductor memory device includes a mammy cell array including a plurality of memory cells and a control logic circuit configured to control the semiconductor memory device. The control logic circuit includes a mode register and a remaining lifetime calculating device configured to count usage metrics based on one or more of the following: a number of clock signals received from a memory controller, an amount of data transmitted or received to or from the memory controller, and/or a number of commands received from the memory controller. The remaining lifetime calculating device generates a remaining lifetime code representing a remaining lifetime of the semiconductor memory device based on the usage metrics, and stores the remaining lifetime code in the mode register.