公开(公告)号：US20250165384A1

公开(公告)日：2025-05-22

申请号：US18930522

申请日：2024-10-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyunho GWAK ,  Sangwon JUNG ,  Jinsoo YOO ,  Sihoon CHOI

IPC: G06F12/02 ,  G06F13/28

Abstract: A storage device includes a memory controller, a buffer memory, and a memory device including a plurality of non-volatile memory devices connected to the memory controller via an identical channel. The memory controller is configured to generate a first command for performing a first DMA operation and a second command for performing a second DMA operation, adjust an output time interval between a first output time point of the first command with respect to a first non-volatile memory device among the plurality of non-volatile memory devices and a second output time point of the second command with respect to a second non-volatile memory device among the plurality of non-volatile memory devices, and is configured to add a time interval corresponding to the output time interval between an end time point of the first DMA operation corresponding to the first command and a start time point of the second DMA operation corresponding to the second command.