公开(公告)号：US20190155785A1

公开(公告)日：2019-05-23

申请号：US15969964

申请日：2018-05-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong-Lae PARK ,  Soo Hyun KIM ,  Young Tae LEE

IPC: G06F15/82 ,  G06F11/34 ,  G06F11/30

Abstract: Provided are multi-core control systems. A multi-core control system includes multiple cores including a first core; and a process dependency recognizer configured to recognize a dependency between processes each executed in the respective cores, wherein if the first core waits for a first period of time to execute a first process, the first core recognizes a process on which the first process depends by the process dependency recognizer.

公开(公告)号：US20210055988A1

公开(公告)日：2021-02-25

申请号：US16857358

申请日：2020-04-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bo Mi KIM ,  Dong Gun KIM ,  Soo Hyun KIM ,  Ki Hyun CHOI ,  Pil Chang SON

IPC: G06F11/10

Abstract: An operating method of a memory controller to update metadata using journaling data in a short time during a booting operation, and to maintain reliability of the updated metadata. The operating method of a memory controller includes loading metadata into sub-regions of a buffer memory, updating the metadata using journaling data in a state that error correction code (ECC) functions of memory controller for the sub-regions are disabled, generating a first parity data of data stored in the first sub-region, and enabling the ECC function of the first sub-region, after the first parity data is generated.

公开(公告)号：US20200160120A1

公开(公告)日：2020-05-21

申请号：US16444632

申请日：2019-06-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： YoungTae LEE ,  Soo Hyun KIM ,  Jong-Lae PARK ,  Choong Hoon PARK

IPC: G06K9/62 ,  G06F9/38 ,  G06F15/80

Abstract: A computing device and a method for operating the computing device are provided. The computing device includes a task classifying module and a task allocating and managing module. The task classifying module classifies a task scheduled to be processed by a multi-core processor into an expectable task or a normal task. The task allocating and managing module selects one core of the multi-core processor as a target core and allocates the task scheduled to be processed to the target core. In response to the task scheduled to be processed being classified as the normal task, the task allocating and managing module determines whether to allocate the normal task to the target core depending on whether the target core processes a previously allocated expectable task.

公开(公告)号：US20230418667A1

公开(公告)日：2023-12-28

申请号：US18243477

申请日：2023-09-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Young Tae LEE ,  Soo Hyun KIM ,  Jong-Lae PARK ,  Choong Hoon PARK

IPC: G06F9/48 ,  G06F15/80

CPC classification number: G06F9/4881 ,  G06F15/80

Abstract: A computing device includes a multi-core processor which includes two or more cores, each having a significant task list queue and a normal task list queue, and a scheduler which allocates a task to each of the two or more cores. The scheduler, following allocation of the tasks, receives a new task, selects one core among the two or more cores based on task information of the new task, and allocates the new task to the selected core, when the allocation of the new task to the selected core will not change an execution schedule of a significant task in the significant task list queue of the selected core.

公开(公告)号：US20190129839A1

公开(公告)日：2019-05-02

申请号：US15994247

申请日：2018-05-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soo Hyun KIM ,  Dong-Young SEO ,  Sang Kwon MOON

IPC: G06F12/02 ,  G06F3/06 ,  G06F12/0804

Abstract: A data storage device is provided. The data storage device a buffer configured to store a mapping table comprising physical block addresses (PBAs) corresponding to logical block addresses (LBAs), a non-volatile memory configured to store data; and a controller configured to control the buffer and the non-volatile. The controller is configured to read data stored at a first PBA of the non-volatile memory corresponding to a first LBA by referring to the mapping table when receiving a command to read data corresponding to the first LBA from outside of the data storage device, and, when a second LBA included in the data read from the non-volatile memory is different from the first LBA, retry reading, from the non-volatile memory, the data corresponding to the first LBA.