公开(公告)号：US20220237351A1

公开(公告)日：2022-07-28

申请号：US17552819

申请日：2021-12-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Soonwoo CHOI ,  Jung Woon LEE ,  Junyoung JEONG

IPC: G06F30/33 ,  G06F30/333 ,  G06F30/323

Abstract: A computing system configured to verify design of an integrated circuit (IC) includes a memory and a processor. The memory is configured to store computer executable instructions. The processor is configured to generate a first coverage model for at least two high-level parameters from the Institute of Electrical and Electronics Engineers (IEEE) 802.11 standard or hardware description language (HDL) code by executing the computer executable instructions, generate a second coverage model for low-level internal signals from the HDL code by executing the computer executable instructions, and generate a plurality of test packets for a regression test by using at least one of the first coverage model or the second coverage model by executing the computer executable instructions.