公开(公告)号：US20250056814A1

公开(公告)日：2025-02-13

申请号：US18796880

申请日：2024-08-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seulji Song ,  Hodae Kim ,  Woojun Jeong

IPC: H10B63/00 ,  H10N70/00

Abstract: A memory device includes a first conductive line, a second conductive line, and a memory cell disposed between the first and second conductive lines. The memory cell includes a lower electrode layer, a switching pattern, and an upper electrode layer. The switching pattern includes a main region including a pair of first side walls and a pair of second walls, and a corner region at four corners of the main region. The switching pattern includes a chalcogenide layer including a Group VI chalcogen element, an element of Group IV and an element of Group V, and the concentration of the Group IV element in the corner region is greater than that of the Group IV element in the main region, or the concentration of the Group V element in the corner region is greater than that of the Group V element in the main region.