公开(公告)号：US20230326926A1

公开(公告)日：2023-10-12

申请号：US17841299

申请日：2022-06-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： WookHyun KWON ,  Byounghak HONG ,  Sooyoung PARK ,  Kang-ill SEO

IPC: H01L27/092 ,  H01L29/06 ,  H01L29/417 ,  H01L29/423 ,  H01L29/786

CPC classification number: H01L27/0922 ,  H01L29/0665 ,  H01L29/41733 ,  H01L29/42392 ,  H01L29/78618 ,  H01L29/78696

Abstract: A multi-stack semiconductor device includes: a substrate; a lower field-effect transistor including a lower channel structure, a lower gate structure surrounding the lower channel structure, and 1st and 2nd source/drain regions; and an upper field-effect transistor, on the lower field-effect transistor, including an upper channel structure, an upper gate structure surrounding the upper channel structure, and 3rd and 4th source/drain regions vertically above the 1st and 2nd source/drain regions, respectively, wherein the 1st source/drain region is connected to one of a positive voltage source and a negative voltage source, and the 3rd source/drain region is connected to the other of the positive voltage source and the negative voltage source, and wherein a top portion of the 2nd source/drain region and a bottom portion the 4th source/drain region are connected to each other.

公开(公告)号：US20230238441A1

公开(公告)日：2023-07-27

申请号：US17966375

申请日：2022-10-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junmo PARK ,  Yeonho PARK ,  WookHyun KWON ,  Kern RIM

IPC: H01L29/423 ,  H01L27/092 ,  H01L23/522 ,  H01L23/528 ,  H01L29/49

CPC classification number: H01L29/42392 ,  H01L27/092 ,  H01L23/5226 ,  H01L23/5283 ,  H01L29/4908 ,  H01L29/0673

Abstract: A semiconductor device may include a substrate including first and second active regions, which are adjacent to each other, first and second active patterns provided on the first and second active regions, respectively, and a gate electrode extended to cross the first and second active patterns. The gate electrode may include first and second electrode portions provided on the first and second active regions, respectively. The second electrode portion may include a first metal pattern, an etch barrier pattern, a second metal pattern, and a third metal pattern sequentially covering the second active pattern. The first electrode portion may include a second metal pattern covering the first active pattern. The etch barrier pattern may be in contact with the first metal pattern and the second metal pattern, and the etch barrier pattern may be thinner than the first metal pattern and thinner than the second metal pattern.