SEMICONDUCTOR PACKAGE INCLUDING SUB-PACKAGE

    公开(公告)号:US20230111207A1

    公开(公告)日:2023-04-13

    申请号:US17850488

    申请日:2022-06-27

    Abstract: A semiconductor package includes; a redistribution wiring layer, a controller chip centrally disposed on the redistribution wiring layer, a first sealant disposed on the redistribution wiring layer, wherein the controller chip is buried in the first sealant, through vias connected to the redistribution wiring layer through the first sealant, and a sub-package disposed on an upper surface of the first sealant. The sub-package may include a first stack structure disposed to one side of the controller chip on the upper surface of the first sealant and including vertically stacked chips, a second stack structure disposed to another side of the controller chip on the upper surface of the first sealant adjacent to the first stack structure in a first horizontal direction and including vertically stacked chips, and a second sealant sealing the first stack structure and the second stack structure.

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