公开(公告)号：US20250104217A1

公开(公告)日：2025-03-27

申请号：US18784343

申请日：2024-07-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bo Gyeong Kang ,  Ye Ji Kim ,  Min-Chul Park ,  Byoung Seon Choi ,  Seong Ryeol Kim ,  Young-Gu Kim ,  Jae Myung Choe

IPC: G06T7/00 ,  G06V10/44 ,  G06V10/75 ,  G06V10/762

Abstract: A computing device of predicting potential predicting potential defect-inducing factors within a semiconductor layout is provided. The computing device comprising: a machine learning module, calculating predicted measurement data corresponding to at least one first semiconductor layout image among a plurality of semiconductor layout mages after being trained based on the plurality of semiconductor layout images and corresponding real measurement data and an image explanation module generating an attribution map image of the predicted measurement data based on an image regression model utilizing an integrated gradient (IG) manner, analyzing the attribution map image and detecting elements within the attribution map image with attribution values with high sensitivity to the predicted measurement data as potential defect-inducing factors in advance.