公开(公告)号：US20240321874A1

公开(公告)日：2024-09-26

申请号：US18499117

申请日：2023-10-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jeonghyeon Lee ,  Hakjong Lee ,  Yeonghan Gwon ,  Hanyoung Song ,  Subin Lee ,  Junyoup Lee ,  Hyunjun Lim ,  Taeho Cha ,  Seunghyeon Hong

IPC: H01L27/088 ,  H01L21/762 ,  H01L21/8234

CPC classification number: H01L27/088 ,  H01L21/76224 ,  H01L21/823481

Abstract: An integrated circuit device includes a pair of fin-type active regions collinear with each other on a substrate, a gate line disposed on one of the fin-type active regions, a capping insulating layer that covers the gate line, and a fin isolation insulating portion that passes through the capping insulating layer in a vertical direction between the pair of fin-type active regions. The fin isolation insulating portion includes an isolation insulating plug that includes a first portion disposed between the pair of fin-type active regions and a second portion integrally connected to the first portion and that passes through the capping insulating layer in the vertical direction, and an isolation insulating liner that surrounds a bottom surface and a sidewall of the isolation insulating plug. The isolation insulating liner includes an uppermost portion that is closer to the substrate than a top surface of the isolation insulating plug.