公开(公告)号：US10153771B2

公开(公告)日：2018-12-11

申请号：US14879497

申请日：2015-10-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seong-Young Ryu ,  Yong-Hoan Kim ,  Eun-Jeong Park

IPC: H03L5/00 ,  H03K19/0185 ,  G09G5/00

Abstract: A negative-level shifting circuit includes a first level shifter including an input circuit configured to receive a logic signal having a first voltage level and a load circuit configured to generate a first output signal having a second voltage level based on a voltage generated by the input circuit, and a second level shifter configured to receive the first output signal from the first level shifter and generate a second output signal having a third voltage level. The first level shifter further includes a shielding circuit connected between the input circuit and the load circuit and configured to separate an operating voltage region of the input circuit from an operating voltage region of the load circuit such that the input circuit operates in a positive voltage region and the load circuit operates in a negative voltage region.