公开(公告)号：US20230395029A1

公开(公告)日：2023-12-07

申请号：US18237515

申请日：2023-08-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyunghoon CHUNG ,  Jihoon KIM ,  Yongsoo LEE ,  Jihyun LEE ,  Minje HYUN

IPC: G09G3/3233

CPC classification number: G09G3/3233 ,  G09G2300/0842 ,  G09G3/3648

Abstract: A display device includes: a charge sharing controller to generate the plurality of group switch control signals based on first bits of (K−1)th digital data groups and second bits of digital data groups. The (K−1)th digital data groups correspond to pixel values of a (K−1)th row of the display panel. The Kth data digital groups correspond to pixel values of a Kth row of the display panel. The charge sharing controller is configured to, with respect to each of the plurality of source line groups, activate each of the plurality of group switch control signals to perform the charge sharing in response to the first bits satisfying a first condition, and the first bits and the second bits satisfying a second condition. The first bits and the second bits are not compared to each other to output a count value.

公开(公告)号：US20230047827A1

公开(公告)日：2023-02-16

申请号：US17691654

申请日：2022-03-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jihoon KIM ,  Yongsoo LEE ,  Kyunghoon CHUNG ,  Minje HYUN

IPC: G09G3/3225

Abstract: A display driver integrated circuit includes a gamma circuit, a control circuit, and an output buffer circuit. The gamma circuit generates a plurality of gamma voltages based on gamma control information, a first gamma power supply voltage and a second gamma power supply voltage. The control circuit calculates a gamma limit value based on panel brightness information, voltage levels of the first and second gamma power supply voltages and the number of the plurality of gamma voltages. The control circuit generates a mode determination signal. The output buffer circuit includes a plurality of buffer circuits. Each of the plurality of buffer circuits includes an input stage and the input stage includes first transistors and second transistors. In a first driving mode, each of the plurality of buffer circuits turns off the first transistors and turns on the second transistors included in the input stage.