公开(公告)号：US09183149B2

公开(公告)日：2015-11-10

申请号：US13793023

申请日：2013-03-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Il Park ,  Young Pyo Joo

IPC: G06F12/00 ,  G06F12/08

CPC classification number: G06F12/0831

Abstract: A multiprocessor system includes a plurality of master devices, at least one slave device, and a system bus connecting the master devices to the at least one slave device. At least one of the master devices includes at least one cache memory, and the system bus processes a data write or data read request corresponding a transaction issued to the slave device from at least one of the master devices prior to termination of a snooping operation on the master devices.

Abstract translation: 多处理器系统包括多个主设备，至少一个从设备和将主设备连接到至少一个从设备的系统总线。 主设备中的至少一个包括至少一个高速缓冲存储器，并且系统总线在对窥探操作终止之前从至少一个主设备处理对应于从从设备发出的事务的数据写入或数据读取请求 主设备。