公开(公告)号：US20130322160A1

公开(公告)日：2013-12-05

申请号：US13799967

申请日：2013-03-13

Applicant: SAMSUNG Electronics Co., Ltd.

Inventor： Cheol KIM ,  Sang-ho SHIN ,  Jung-sik KIM

IPC: G11C29/04

CPC classification number: G11C29/04 ,  G11C29/4401 ,  G11C29/783 ,  G11C29/785 ,  G11C29/787 ,  G11C2029/4402

Abstract: A memory device to correct a defect cell generated after packing is performed includes a memory cell array in which a plurality of memory cells are arranged, a repair circuit unit including a first storage unit to store defect cell information in the memory cell array, and a fuse circuit unit including a second storage unit that is programmed according to the defect cell information stored in the first storage unit. The first storage unit includes a volatile memory device, and the second storage unit includes a non-volatile memory device.

Abstract translation: 用于校正打包后产生的缺陷单元的存储装置包括其中布置多个存储单元的存储单元阵列，包括存储单元阵列中的缺陷单元信息的第一存储单元的修复电路单元，以及 熔丝电路单元，包括根据存储在第一存储单元中的缺陷单元信息编程的第二存储单元。 第一存储单元包括易失性存储器件，并且第二存储单元包括非易失性存储器件。