公开(公告)号：US20240040786A1

公开(公告)日：2024-02-01

申请号：US18484156

申请日：2023-10-10

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Yusuke YOSHIDA ,  Teruo OKINA ,  Takanori HANADA ,  Shigeyuki YOSHIDA

IPC: H10B43/27 ,  H10B41/27

CPC classification number: H10B43/27 ,  H10B41/27

Abstract: A semiconductor structure includes an alternating stack of insulating layers and electrically conductive layers that is located on a front side of at least one semiconductor material layer. memory openings vertically extending through the alternating stack, memory opening fill structures located in the memory openings and including a respective vertical semiconductor channel and a respective vertical stack of memory elements, a dielectric material portion laterally offset from the alternating stack, a connection via structure vertically extending through the dielectric material portion, a metallic plate in contact with a proximal end surface of the connection via structure, and a backside contact pad in electrical contact with the metallic plate and spaced from the connection via structure by the metallic plate.